发明名称 Semiconductor memory systems using regression analysis and read methods thereof
摘要 A memory system includes: a bit counter and a regression analyzer. The bit counter is configured to generate a plurality of count values based on data read from selected memory cells using a plurality of different read voltages, each of the plurality of count values being indicative of a number of memory cells of a memory device having threshold voltages between pairs of the plurality of different read voltages. The regression analyzer is configured to determine read voltage for the selected memory cells based on the plurality of count values using regression analysis.
申请公布号 US9111626(B2) 申请公布日期 2015.08.18
申请号 US201314062092 申请日期 2013.10.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Kim Kwanghoon;Kong Junjin;Seol Changkyu;Son Hong Rak
分类号 G11C16/04;G11C16/26;G11C11/56;G11C16/34;G11C16/10 主分类号 G11C16/04
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. A read method for a nonvolatile memory device, the method comprising: performing read operations on selected memory cells using a plurality of different read voltages; counting a number of memory cells in each of a plurality of threshold voltage bands based on data read using the different read voltages; deciding coordinate values of a probability density function corresponding to a threshold voltage of the selected memory cells based on the number of memory cells in each of the plurality of threshold voltage bands; obtaining coefficients of the probability density function based on the coordinate values; and deciding, as a read voltage of the selected memory cells, a threshold voltage of a coordinate point at which a slope of the probability density function is ‘0’.
地址 Gyeonggi-do KR