Thin film transistor array panel including layered line structure and method for manufacturing the same

摘要

The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).

主权项

1. A thin film transistor array panel comprising:
an insulating substrate; a gate line disposed on the insulating substrate; a gate insulating layer which is in contact with the gate line; an oxide semiconductor which is in contact with the gate insulating layer; a drain electrode; and a data line having a source electrode disposed over the gate insulating layer, the drain electrode being adjacent to the source electrode and spaced apart therefrom; wherein at least one of the gate line, the data line, and the drain electrode comprises a first layer comprising a conductive oxide, a second layer comprising copper (Cu) and a third layer comprising a conductive oxide.