发明名称 |
Memory allocation in a system using memory striping |
摘要 |
A system and associated methods are disclosed for allocating memory in a system providing translation of virtual memory addresses to physical memory addresses in a parallel computing system using memory striping. One method comprises: receiving a request for memory allocation, identifying an available virtually-contiguous physically-non-contiguous memory region (VCPNCMR) of at least the requested size, where the VCPNCMR is arranged such that physical memory addresses for the VCPNCMR may be derived from a corresponding virtual memory addresses by shifting a contiguous set of bits of the virtual memory address in accordance with information in a matching row of a virtual memory address matching table, and combining the shifted bits with high-order physical memory address bits also associated with the determined matching row and with low-order bits of the virtual memory address, and providing to the requesting process a starting address of the identified VCPNCMR. |
申请公布号 |
US9110826(B2) |
申请公布日期 |
2015.08.18 |
申请号 |
US201414209632 |
申请日期 |
2014.03.13 |
申请人 |
Cognitive Electronics, Inc. |
发明人 |
Felch Andrew C. |
分类号 |
G06F12/06;G06F12/10;G06F9/26 |
主分类号 |
G06F12/06 |
代理机构 |
Wolf, Greenfield & Sacks, P.C. |
代理人 |
Wolf, Greenfield & Sacks, P.C. |
主权项 |
1. A method of allocating memory comprising:
receiving, from a process being executed by a first processor, a request for memory allocation, the request comprising a requested size; identifying an available virtually-contiguous physically-non-contiguous memory region (VCPNCMR) of at least the requested size, wherein the VCPNCMR is arranged such that physical memory addresses for the VCPNCMR may be derived from a corresponding virtual memory addresses by:
shifting a contiguous set of bits of the virtual memory address, wherein the shifting is performed in accordance with information regarding memory address translation associated with a determined matching row of a virtual memory address matching table; andcombining the shifted contiguous set of bits of the virtual memory address with high-order physical memory address bits associated with the determined matching row of the virtual memory address matching table, and with low-order bits of the virtual memory address; and providing to the requesting process a starting address of the identified VCPNCMR of at least the requested size. |
地址 |
Boston MA US |