发明名称 Nonvolatile memory device and fabricating method thereof
摘要 A nonvolatile memory device comprises a channel pattern, a first interlayer dielectric film and a second interlayer dielectric film spaced apart from each other and stacked over each other, a gate pattern disposed between the first interlayer dielectric film and the second interlayer dielectric film, a trap layer disposed between the gate pattern and the channel pattern and a charge spreading inhibition layer disposed between the channel pattern and the first interlayer dielectric film and between the channel pattern and the second interlayer dielectric film. The charge spreading inhibition layer may include charges inside or on its surface. The charge spreading inhibition layer includes at least one of a metal oxide film or a metal nitride film or a metal oxynitride film having a greater dielectric constant than a silicon oxide film.
申请公布号 US9112045(B2) 申请公布日期 2015.08.18
申请号 US201313775833 申请日期 2013.02.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 Kim Ju-Hyung;Kang Chang-Seok;Lee Woon-Kyung
分类号 H01L29/792;H01L29/66;H01L29/423;H01L29/51;H01L27/115 主分类号 H01L29/792
代理机构 F. Chau & Associates, LLP 代理人 F. Chau & Associates, LLP
主权项 1. A nonvolatile memory device comprising: a channel pattern; a first interlayer dielectric film and a second interlayer dielectric film spaced apart from each other and stacked over each other; a gate pattern disposed between the first interlayer dielectric film and the second interlayer dielectric film; a trap layer disposed between the gate pattern and the channel pattern; a charge spreading inhibition layer disposed between the channel pattern and the first interlayer dielectric film, and between the channel pattern and the second interlayer dielectric film; a first block layer disposed on the trap layer; and a second block layer disposed between the first interlayer dielectric film and the gate pattern, between the second interlayer dielectric film and the gate pattern, and between the first block layer and the gate pattern, wherein the charge spreading inhibition layer is disposed on the first block layer, contacting the second block layer.
地址 Suwon-Si, Gyeonggi-Do KR