Nonvolatile semiconductor memory device and method for manufacturing same

摘要

According one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the a stacked body; a first interlayer insulating film on the stacked body; a gate electrode on the first interlayer insulating film; a second interlayer insulating film on the gate electrode; a semiconductor layer extended from an upper end of the second interlayer insulating film to a lower end of the stacked body; a first insulating film between the semiconductor layer and each of the plurality of electrode layers; and a second insulating film between the semiconductor layer and the gate electrode, a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode.

主权项

1. A nonvolatile semiconductor memory device, comprising:
a foundation layer; a stacked body provided on the foundation layer, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the stacked body; a first interlayer insulating film provided on the stacked body; a gate electrode provided on the first interlayer insulating film; a second interlayer insulating film provided on the gate electrode; a semiconductor layer extended from an interior portion of the second interlayer insulating film to a lower end of the stacked body; a first insulating film provided between the semiconductor layer and each of the plurality of electrode layers; a second insulating film provided between the semiconductor layer and the gate electrode; and
a third insulating film provided inside the semiconductor layer, the third insulating film being disposed along the semiconductor layer in an interior portion of the second interlayer insulating film, an upper end of the third insulating film being positioned on an upper side of the gate electrode,a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode.