发明名称 In situ-built pin-grid arrays for coreless substrates, and methods of making same
摘要 A coreless pin-grid array (PGA) substrate includes PGA pins that are integral to the PGA substrate without the use of solder. A process of making the coreless PGA substrate integrates the PGA pins by forming a build-up layer upon the PGA pins such that vias make direct contact to pin heads of the PGA pins.
申请公布号 US9111916(B2) 申请公布日期 2015.08.18
申请号 US201414194936 申请日期 2014.03.03
申请人 Intel Corporation 发明人 Roy Mihir K.;Manusharow Mathew J.
分类号 H01L21/00;H01L21/48;H01L23/498;H01L23/50;H01L25/18;H01L25/00;H05K3/46;H05K3/40;H01L23/00;H05K3/00 主分类号 H01L21/00
代理机构 代理人 Greaves John N.
主权项 1. A process of forming a coreless pin-grid array substrate comprising: forming a seed layer upon a pin-grid array pin mold; forming a PGA precursor film on the seed layer; patterning the PGA precursor film to achieve a plurality of spaced-apart PGA pins; and forming a coreless PGA substrate that integrates the PGA pins including: forming a first interlayer to define a land side of the coreless PGA substrate, wherein the first interlayer contacts the PGA pins at pin heads thereof;filling a via into the first interlayer, wherein the via makes direct contact with a pin head of the PGA pins; andforming a subsequent interlayer to define near a die side of the coreless PGA substrate.
地址 Santa Clara CA US