发明名称 System and method for electrical testing of through silicon vias (TSVs)
摘要 An embodiment of a testing system for carrying out electrical testing of at least one first through via extending, at least in part, through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the first through via and to electrical-connection elements carried by the first body for electrical connection towards the outside; the first electrical test circuit enables detection of at least one electrical parameter of the first through via through the electrical-connection elements.
申请公布号 US9111895(B2) 申请公布日期 2015.08.18
申请号 US201113579562 申请日期 2011.02.16
申请人 STMicroelectonics S.r.l. 发明人 Pagani Alberto
分类号 G01R31/02;H01L21/66;H01L21/768 主分类号 G01R31/02
代理机构 Gardere Wynne Sewell LLP 代理人 Gardere Wynne Sewell LLP
主权项 1. An apparatus, comprising: a first layer of semiconductor material; a first conductive via disposed in the first layer; and a testing circuit operable to allow testing of the first conductive via comprising: a first conductive pad disposed over and electrically coupled to the first layer;a second conductive pad disposed over the first layer;a third conductive pad disposed over the first layer;a switch element having a control node and coupled between the first conductive via and the second conductive pad; anda control circuit having an input node coupled to the third conductive pad and having an output node coupled to the control node of the switch.
地址 Agrate Brianza (MB) IT