Supporting targeted stores in a shared-memory multiprocessor system

摘要

The present embodiments provide a system for supporting targeted stores in a shared-memory multiprocessor. A targeted store enables a first processor to push a cache line to be stored in a cache memory of a second processor in the shared-memory multiprocessor. This eliminates the need for multiple cache-coherence operations to transfer the cache line from the first processor to the second processor. The system includes an interface, such as an application programming interface (API), and a system call interface or an instruction-set architecture (ISA) that provides access to a number of mechanisms for supporting targeted stores. These mechanisms include a thread-location mechanism that determines a location near where a thread is executing in the shared-memory multiprocessor, and a targeted-store mechanism that targets a store to a location (e.g., cache memory) in the shared-memory multiprocessor.

主权项

1. A system comprising:
a shared-memory multiprocessor including a plurality of processors and a memory; and an interface that provides access to,
a thread-location function or instruction that, when executed by a thread:
uses an identifier that identifies the thread to retrieve a location identifier that identifies a cache memory where the thread has accessed data; andreturns the location identifier to the thread; anda targeted-store function or instruction that receives the location identifier and, when executed by the thread, uses the location identifier to push data for the targeted-store function or instruction to the cache memory.