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1. A display device including pixels arranged in rows and columns, the display device comprising:
a first signal line and a second signal line which are disposed in each of the columns, for supplying the pixels with a signal voltage that determines luminance of the pixels; a first power source line and a second power source line; a scanning line disposed in each of the rows; a first control line and a second control line which are disposed in each of the rows, a signal line drive circuit that outputs the signal voltage to the first signal line and the second signal line; and a timing control circuit that controls a timing at which the signal line drive circuit outputs the signal voltage, wherein the pixels compose at least two driving blocks each of which includes at least two of the rows, each of the pixels includes:
a light-emitting element that includes terminals, one of the terminals being connected to the second power source line, the light-emitting element emitting light according to a flow of a signal current corresponding to the signal voltage;a drive transistor that includes a gate, a source, and a drain and converts the signal voltage applied between the gate and the source of the drive transistor into the signal current, one of the source and the drain being connected to the first power source line;a first capacitive element that includes terminals, one of the terminals being connected to the gate of the drive transistor;a second capacitive element that includes terminals, one of the terminals being connected to the one or the other of the terminals of the first capacitive element, and the other of the terminals being connected to the source of the drive transistor;a first switching transistor that includes a gate connected to the second control line, one of a source and a drain connected to the gate of the drive transistor, and the other of the source and the drain connected to the drain of the drive transistor; anda second switching transistor that includes a gate connected to the first control line, and a source and a drain which are arranged between the other of the source and the drain of the drive transistor and the other of the terminals of the light-emitting element, each of the pixels in a kth drive block of the drive blocks further includes a third switching transistor that includes a gate connected to the scanning line, one of a source and a drain connected to the first signal line, and the other of the source and the drain connected to the other of the terminals of the first capacitive element, k being a positive integer, each of the pixels in a (k+1)th drive block of the drive blocks further includes a fourth switching transistor that includes a gate connected to the scanning line, one of a source and a drain connected to the second signal line, and the other of the source and the drain connected to the other of the terminals of the first capacitive element, the second control line is connected to the pixels in a same one of the drive blocks and not connected to the pixels in different ones of the drive blocks, a threshold voltage of the drive transistor of each of the pixels in the (k+1)th drive block is corrected in a period for writing a luminance signal voltage for causing the light-emitting element of each of the pixels in the kth drive block to emit the light, the signal voltage includes the luminance signal voltage and a reference voltage for causing a voltage corresponding to the threshold voltage of the drive transistor to be stored in the first capacitive element and the second capacitive element, and the timing control circuit (i) causes the signal line drive circuit to output the reference voltage to the second signal line when the signal line drive circuit is outputting the luminance final voltage to the first signal line, and (ii) causes the signal line drive circuit to output the reference voltage to the first signal line when the signal line drive circuit is outputting the luminance signal voltage to the second signal line. |
