| 发明名称 |
Fast-wake memory |
| 摘要 |
A memory device is transitioned to a low-power mode in which an active-mode resource required to receive memory access commands from a memory controller at a first command-signaling frequency of the memory device is disabled. A first memory access command, transmitted by the memory controller, is received within the memory device using an alternative signaling resource during a transitional interval in which the active-mode resource is re-enabled. |
| 申请公布号 |
US9110596(B2) |
申请公布日期 |
2015.08.18 |
| 申请号 |
US201414445516 |
申请日期 |
2014.07.29 |
| 申请人 |
Rambus Inc. |
发明人 |
Ware Frederick A.;Zerbe Jared L.;Leibowitz Brian S. |
| 分类号 |
G11C7/22;G06F3/06;G11C11/4072;G11C11/4076;G06F1/32;G11C5/14 |
主分类号 |
G11C7/22 |
| 代理机构 |
|
代理人 |
Shemwell Charles |
| 主权项 |
1. A method of operation within a memory device, the method comprising:
transitioning to a low-power mode in which an active-mode resource required to receive memory access commands from a memory controller at a first command-signaling frequency of the memory device is disabled; and receiving a first memory access command from the memory controller using an alternative signaling resource during a transitional interval in which the active-mode resource is re-enabled. |
| 地址 |
Sunnyvale unknown |
