发明名称 MULTI-COMPOSITION GATE DIELECTRIC FIELD EFFECT TRANSISTORS
摘要 A first gate structure and a second gate structure are formed over a semiconductor material layer. The first gate structure includes a planar silicon-based gate dielectric, a planar high-k gate dielectric, a metallic nitride portion, and a first semiconductor material portion, and the second gate structure includes a silicon-based dielectric material portion and a second semiconductor material portion. After formation of gate spacers and a planarization dielectric layer, the second gate structure is replaced with a transient gate structure including a chemical oxide portion and a second high-k gate dielectric. A work-function metal layer and a conductive material portion can be formed in each gate electrode by replacement of semiconductor material portions. A gate electrode includes the planar silicon-based gate dielectric, the planar high-k gate dielectric, and a U-shaped high-k gate dielectric, and another gate electrode includes the chemical oxide portion and another U-shaped high-k gate dielectric.
申请公布号 US2015228748(A1) 申请公布日期 2015.08.13
申请号 US201414179121 申请日期 2014.02.12
申请人 International Business Machines Corporation 发明人 Alptekin Emre;Kwon Unoh;Lai Wing L.;Li Zhengwen;Narayanan Vijay;Ramachandran Ravikumar;Vega Reinaldo A.
分类号 H01L29/51;H01L29/66;H01L29/40;H01L27/088 主分类号 H01L29/51
代理机构 代理人
主权项 1. A method of forming a semiconductor structure comprising: forming a first material stack and a second material stack on a semiconductor substrate, said first material stack including at least a planar semiconductor oxide-based dielectric portion and a first disposable material portion, and said second material stack including at least a second disposable material portion; forming a planarization dielectric layer around said first and second material stacks; replacing said second material stack with a stack including a chemical oxide layer and a U-shaped high-k dielectric portion; removing said first disposable material portion; and forming a first gate electrode over said planar semiconductor oxide-based dielectric portion and a second gate electrode within a volume laterally bounded by said U-shaped high-k dielectric portion by deposition and planarization of a work function material layer and a conductive material layer.
地址 Armonk NY US