发明名称 |
Methods to Improve Electrical Performance of ZrO2 Based High-K Dielectric Materials for DRAM Applications |
摘要 |
A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly-doped or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly-doped or non-doped material will become crystalline (≧30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack. |
申请公布号 |
US2015228710(A1) |
申请公布日期 |
2015.08.13 |
申请号 |
US201414177118 |
申请日期 |
2014.02.10 |
申请人 |
Elpida Memory, Inc ;Intermolecular, Inc. |
发明人 |
Rui Xiangxin;Chen Hanhong;Fujiwara Naonori;Hashim Imran;Koyanagi Kenichi |
分类号 |
H01L49/02;H01L27/108 |
主分类号 |
H01L49/02 |
代理机构 |
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代理人 |
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主权项 |
1. A method for forming a capacitor stack comprising:
forming a flash layer above a first electrode layer; forming a first dielectric layer above the flash layer, wherein the first dielectric layer comprises metal oxide, wherein the first dielectric layer comprises a dopant, and wherein the dopant comprises silicon; inserting a high band gap fourth dielectric layer within the first dielectric layer during the forming of the first dielectric layer; forming a high band gap second dielectric layer above the first dielectric layer; forming a third dielectric layer above the high band gap second dielectric layer, wherein the third dielectric layer comprises metal oxide, wherein the first dielectric layer comprises a dopant, and wherein the dopant comprises silicon; and forming a capping layer above the third dielectric layer. |
地址 |
Tokyo JP |