SEMICONDUCTOR DEVICE

摘要

A semiconductor device includes first and second fin-shaped silicon layers on a substrate, each corresponding to the dimensions of a sidewall pattern around a dummy pattern. First and second pillar-shaped silicon layers reside on the first and second fin-shaped silicon layers, respectively. An n-type diffusion layer resides in an upper portion of the first fin-shaped silicon layer and in upper and lower portions of the first pillar-shaped silicon layer. A p-type diffusion layer resides in an upper portion of the second fin-shaped silicon layer and upper and lower portions of the second pillar-shaped silicon layer. First and second gate insulating films and metal gate electrodes are around the first and second pillar-shaped silicon layers, respectively. A metal gate line is connected to the first and second metal gate electrodes and extends in a direction perpendicular to the first and second fin-shaped silicon layers.

主权项

1. A semiconductor device comprising:
a first fin-shaped silicon layer on a substrate; a second fin-shaped silicon layer on the substrate, where the first fin-shaped silicon layer and the second fin-shaped silicon layer correspond to the dimensions of a sidewall pattern around a dummy pattern; a first insulating film around the first fin-shaped silicon layer and the second fin-shaped silicon layer; a first pillar-shaped silicon layer on the first fin-shaped silicon layer; a second pillar-shaped silicon layer on the second fin-shaped silicon layer; an n-type diffusion layer in an upper portion of the first fin-shaped silicon layer and a lower portion of the first pillar-shaped silicon layer; an n-type diffusion layer in an upper portion of the first pillar-shaped silicon layer; a p-type diffusion layer in an upper portion of the second fin-shaped silicon layer and a lower portion of the second pillar-shaped silicon layer; a p-type diffusion layer in an upper portion of the second pillar-shaped silicon layer; a gate insulating film around the first pillar-shaped silicon layer; a first metal gate electrode around the gate insulating film; a gate insulating film around the second pillar-shaped silicon layer; a second metal gate electrode around the gate insulating film; a metal gate line connected to the first metal gate electrode and to the second metal gate electrode and extending in a direction perpendicular to the first fin-shaped silicon layer and the second fin-shaped silicon layer.