| 摘要 |
An information processing device provided with at least one host and at least one memory subsystem, said host being provided with an information processing circuit which issues, to said memory subsystem, identifiers indicating the order in which data can be erased, also issues data write instructions to said memory subsystem, and processes data, said memory subsystem being provided with a first memory and a control circuit for writing data to the first memory, wherein: the first memory has a data erase unit size greater than the data write unit size; and the control circuit classifies data on the basis of the identifiers, writes data belonging to a first class to a bulk-erasable first bulk erase region in the first memory, and writes data belonging to a second class different from the first class to a bulk-erasable second bulk erase region in the first memory. This information processing device can be used to reduce the cost of a storage device while improving the performance and life of the storage device. |
