VIA STRUCTURES AND SEMICONDUCTOR DEVICES HAVING A VIA PLUG

摘要

Described is a semiconductor device which includes a bottom device and a top device which is arranged on the bottom device. The bottom device includes a bottom substrate, a bottom plug pad which is formed on the bottom substrate, and a bottom interlayer dielectric layer which covers the bottom plug pad. The top device includes a top substrate, a first etch delay structure which is formed on the bottom side of the top substrate, a top plug pad which is formed under the bottom side of the top substrate, a top interlayer dielectric layer which covers the top plug pad, and a via plug which is in contact with the top plug pad and the bottom plug pad by passing through the top substrate. The via plug includes a first part which is in contact with the first etch delay structure and the top plug pad and a second part which is in contact with the bottom plug pad.