发明名称 マルチメディア処理電力管理のためのパワーゲーティング
摘要 <p>Circuitry for implementation of power gating within a multimedia processing environment is described. The disclosed circuitry supports effective power management for a multimedia display processor, which may include various components that operate separately from one another. In this manner, the disclosed circuitry can support power conservation and enhanced performance within a multimedia processing environment. In some aspects, headswitch or footswitch circuitry may be implemented to selectively connect and disconnect different logic components of a multimedia display processor to a power rail depending on the operating mode of the respective logic component, e.g., depending on whether the logic component is in an active or inactive mode.</p>
申请公布号 JP5763042(B2) 申请公布日期 2015.08.12
申请号 JP20120275695 申请日期 2012.12.18
申请人 发明人
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
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