| 摘要 |
<p>A semiconductor memory device includes a memory cell connected to a read bit line and a pair of write bit lines, and a data amplifier connected to the read bit line. A precharge potential resetting circuit uses a function of generating precharge potentials to the pair of write bit lines based on data of the memory cell amplified by the data amplifier to set the precharge potentials of the non-selected pair of write bit lines to have a potential relationship corresponding to the data stored by the memory cell. As a result, data destruction of the non-selected memory cell during write operation is reduced or prevented, and the speed of operation is increased and the area is reduced.</p> |
