| 摘要 |
PROBLEM TO BE SOLVED: To provide a symbol synchronization acquisition system, capable of stable and high-speed symbol synchronous acquisition and synchronous follow-up with high accuracy, even in a low C/N environment and a communication path environment possibly having sudden disturbance.SOLUTION: A symbol synchronization acquisition system for synchronous acquisition of a symbol clock in a digitally modulated input sequence using a PLL circuit includes: means for calculating a feature amount sequence of the input sequence; means 71 for FFT processing the feature amount sequence of first N samples (N is an integer of 2 or greater); based on the FFT processing result, means 72 for searching a maximum spectral component; and means 73 for estimating a symbol clock phase at the N/2-th sample. The frequency of the maximum spectral component and the phase estimation value are set to be initial setting values for a PPLL circuit. |
