发明名称 Semiconductor device and method for manufacturing the same
摘要 This invention provides a semiconductor device with improved reliability. The semiconductor device (CHP1) comprising:a semiconductor substrate (SS) having an element formation surface;a first insulating film (PVL) that has a first surface (PVb) facing the semiconductor substrate (SS), a second surface (PVt) opposite to the first surface (PVb), and a plurality of openings (PVk) passing therethrough from one of the first surface (PVb) and the second surface (PVt) to the other in the thickness direction, and is formed so as to cover the element formation surface of the semiconductor substrate (SS); anda plurality of electrode pads (PD1, PD2, PD3) that are formed between the first insulating film (PVL) and the semiconductor substrate (SS), and are exposed from the first insulating film (PVL) at positions overlapping the openings (PVk) in the first insulating film (PVL),wherein, the electrode pads include:a plurality of the first-line electrode pads (PD1) formed in a first line along a first chip side (Cs1) of a perimeter of the second surface in plan view;a plurality of second-line electrode pads (PD2) formed in a second line along the first chip side (Cs1), the second line located further than the first line from the first chip side (Cs1) in plan view; anda plurality of third-line electrode pads (PD3) formed in a third line along the first chip side (Cs1), the third line located further than the second line from the first chip side (Cs1) in plan view, and wherein, the areas of the respective first-line electrode pads (PD1) are smaller than the areas of the respective second-line electrode pads (PD2) and the respective third-line electrode pads (PD3).
申请公布号 EP2876679(A3) 申请公布日期 2015.08.12
申请号 EP20140187829 申请日期 2014.10.06
申请人 RENESAS ELECTRONICS CORPORATION 发明人 ISHII, YASUSHI;ADACHI, TETSUO
分类号 H01L23/485;H01L21/66;H01L23/31;H01L23/58 主分类号 H01L23/485
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