| 主权项 |
1. A method for fabricating a transistor of a semiconductor device, the method comprising:
forming isolation layers to define at least a first active region, a second active region, a third active region, and a fourth active region in a semiconductor substrate, wherein the first and second active regions are parallelized in a Y-axis direction of the semiconductor substrate, the first and third active regions are parallelized in an X-axis direction of the semiconductor substrate, and the third and fourth active regions are parallelized in the Y-axis direction of the semiconductor substrate; forming a first recess trench and a second recess trench in the first active region, forming a third recess trench and a fourth recess trench in the second active region, forming a fifth recess trench and a sixth recess trench in the third active region, and forming a seventh recess trench and a eighth recess trench in the fourth active region by etching the semiconductor substrate to a predetermined depth, wherein the first to the eighth recess trenches cross the semiconductor substrate in the Y-axis direction and the first to the eighth recess trenches are disposed completely within each of the first to fourth active regions; and forming a first gate line and a second gate line in a substantially straight line pattern, wherein the first gate line crosses each of the first and second recess trenches at a right angle and the first gate line lies from the first recess trench of the first active region to the sixth recess trench of the third active region, wherein the second gate line is disposed on the second active region and the fourth active region and the second gate line crosses each of the third and fourth recess trenches at a right angle and the second gate line lies from the third recess trench of the second active region to the eighth recess trench of the fourth active region. |
