发明名称 |
Methods and arrangements relating to semiconductor packages including multi-memory dies |
摘要 |
Embodiments provide a method comprising providing a multi-memory die that comprises multiple individual memory dies. Each of the individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies. The multi-memory die is created by singulating the wafer of semiconductor material into memory dies where at least one of the memory dies is a multi-memory die that includes multiple individual memory dies that are still physically connected together. The method further comprises coupling a semiconductor die to the multi-memory die. |
申请公布号 |
US9105610(B2) |
申请公布日期 |
2015.08.11 |
申请号 |
US201414218631 |
申请日期 |
2014.03.18 |
申请人 |
Marvell World Trade Ltd |
发明人 |
Sutardja Sehat |
分类号 |
H01L21/00;H01L23/00;H01L25/065;H01L25/10;H01L25/00;H01L25/16;H01L23/31;H01L25/18 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
1. A method comprising:
providing a multi-memory die that comprises multiple individual memory dies, wherein
each of the individual memory dies is defined as an individual memory die within a wafer of semiconductor material during production of memory dies, andthe multi-memory die is created by singulating the wafer of semiconductor material into memory dies where at least one of the memory dies is a multi-memory die that includes at least a first memory die and a second memory die that are physically connected together along a border region; and coupling a semiconductor die to the multi-memory die, wherein the semiconductor die is mounted on at least a part of the border region of the multi-memory die. |
地址 |
St. Michael BB |