发明名称 |
Selectable-tap equalizer |
摘要 |
A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval. |
申请公布号 |
US9106397(B2) |
申请公布日期 |
2015.08.11 |
申请号 |
US201514616629 |
申请日期 |
2015.02.06 |
申请人 |
Rambus Inc. |
发明人 |
Zerbe Jared L.;Stojanovic Vladimir M.;Chen Fred F. |
分类号 |
H04L7/00;H04L25/03;H04L7/033 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated circuit receiver to receive an input signal from a conductive signal path, comprising:
a sampling circuit to sample the input signal and generate digital samples according to a first timing signal; an equalization circuit to equalize the input signal, in dependence on at least one preceding digital sample, according to a second timing signal; and circuitry to generate the second timing signal in a manner that is phase-offset relative to edges of the first timing signal. |
地址 |
Sunnyvale CA US |