| 摘要 |
<p>The present invention relates to a frequency synthesizing apparatus having a multi-phase-locked loop circuit structure and an operating method thereof. The frequency synthesizing apparatus having a multi-phase-locked loop circuit structure comprises: a reference frequency generator to generate and output a reference frequency; n (n is a natural number higher than or equal to two) phase-locked loops (PLL) to oscillate output frequencies using the reference frequency as a reference and adjust frequencies of the output frequencies according to PLL frequency setting data; a scheduler to acquire and register one or more PLL frequency setting data and then output the data alternately to the n phase-locked loops to allow a next phase-locked loop to adjust and stabilize an output frequency while a current phase-locked loop generates a stabilized output frequency; and a switching unit to alternately output the output frequencies of the n phase-locked loops under control of the scheduler.</p> |
