Defect mitigation structures for semiconductor devices

摘要

A method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer. The substrate intermediate layer and the device intermediate layer comprise a distribution in their compositions along a thickness coordinate.

主权项

1. A semiconductor device, comprising:
a substrate; a defect mitigation structure disposed over the substrate, wherein the defect mitigation structure includes:
a substrate nucleation layer disposed over the substrate;a substrate intermediate layer disposed over the substrate nucleation layer;a substrate top layer disposed over the substrate intermediate layer;a device nucleation layer disposed over the substrate top layer, wherein the device nucleation layer comprises one of Ge3N4 and (Si1-xGex)3N4;a device intermediate layer disposed over the device nucleation layer, wherein a coefficient of thermal expansion of the device intermediate layer is different from a coefficient of thermal expansion of the device nucleation layer, and wherein lattice parameters of the device intermediate layer are substantially similar to lattice parameters of the device nucleation layer; anda device top layer disposed over the device intermediate layer; and a device active layer disposed over the defect mitigation structure.