发明名称 Low-distortion programmable capacitor array
摘要 In one example embodiment, a programmable capacitor array is provided for low distortion and minimizing linearity degradation of an input (Vin) by utilizing control circuitry to switch on and off an array of MOSFET switches. The control circuitry turns on a MOSFET to load a capacitance on Vin and turns off the MOSFET to remove the capacitance from Vin in response to a Din control signal. When the intention is to load Vin with the capacitance, the MOSFET is left on continuously. When the intention is to remove or unload the capacitance from Vin, the MOSFET is primarily turned off, however, the MOSFET is still periodically turned on with appropriate voltage levels in response to a clock signal for periods of time when the loading of the capacitance on Vin is tolerable to the system, thereby ensuring minimal linearity degradation of Vin due to the programmable capacitor array system.
申请公布号 US9106210(B2) 申请公布日期 2015.08.11
申请号 US201414187440 申请日期 2014.02.24
申请人 Analog Devices, Inc. 发明人 Devarajan Siddharth;Singer Lawrence A.
分类号 H03K5/01;H03H19/00 主分类号 H03K5/01
代理机构 Patent Capital Group 代理人 Patent Capital Group
主权项 1. A low distortion programmable capacitor for reducing linearity degradation on an input signal, comprising: a Vin input for receiving a Vin signal; a capacitor coupled between the Vin input and a first node; a transistor having a gate and a drain coupled to the first node, the transistor configured to turn on to load the Vin input with the capacitor and turn off to remove the load of the capacitor from the Vin input in response to a VG signal on the gate; and control circuitry that has a Din input and a clock input, the control circuitry configured to provide the VG signal to turn on the transistor when the Din input is in a first state, and, when the Din input is in a second state, to provide the VG signal to switch the transistor on and off in response to a signal on the clock input to reduce linearity degradation on Vin signal.
地址 Norwood MA US