发明名称 |
Semiconductor device and method for manufacturing the same |
摘要 |
In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode. |
申请公布号 |
US9105715(B2) |
申请公布日期 |
2015.08.11 |
申请号 |
US200913146654 |
申请日期 |
2009.04.30 |
申请人 |
Mitsubishi Electric Corporation |
发明人 |
Miura Naruhisa;Nakata Shuhei;Ohtsuka Kenichi;Watanabe Shoyu;Yutani Naoki |
分类号 |
H01L29/66;H01L29/78;H01L29/10;H01L29/06;H01L29/16;H01L29/423;H01L29/45;H01L29/49 |
主分类号 |
H01L29/66 |
代理机构 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A semiconductor device comprising:
a semiconductor substrate having a first major surface and a second major surface facing each other; a drift layer of a first conductivity type on the first major surface; a cell region in one upper portion of the drift layer and in the center of the semiconductor device; a well of a second conductivity type in another upper portion of the drift layer disposed in a peripheral region of the semiconductor device; a first electrode above the first major surface of the semiconductor substrate, the first electrode is electrically connected to the well; a second electrode under the second major surface of the semiconductor substrate; an insulating film on the well; and a gate electrode and a gate wiring provided on the insulating film, wherein the gate wiring is a silicide created from a portion of a poly-silicon layer used for the gate electrode, and the gate wiring is electrically connected to the gate electrode in the horizontal direction and does not overlap with the gate electrode. |
地址 |
Tokyo JP |