发明名称 |
Enhanced decoding and demapping method and apparatus for QAM data signals |
摘要 |
A receiver circuit, including a multi-stage QAM de-mapper, for receiving a QAM data signal is disclosed. A first de-mapper circuit recovers a set of encoded data bits from the QAM data signal by calculating a plurality of distances between a received QAM symbol and each of a plurality of possible constellation points. A second de-mapper circuit then generates a set of unencoded data bits for the received QAM symbol based, at least in part, on the plurality of distances calculated by the first de-mapper circuit. The receiver circuit may further include a decoder circuit to decode the set of encoded data bits recovered by the first de-mapper circuit. The second de-mapper circuit may identify a subset of the plurality of possible constellation points based on a result of the decoding and select a constellation point that is associated with the shortest distance of the plurality of distances. |
申请公布号 |
US9106470(B2) |
申请公布日期 |
2015.08.11 |
申请号 |
US201313946706 |
申请日期 |
2013.07.19 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Zhao Lu;Brueck Stefan;Schlupkothen Stephan;Amin Muhammad Awais;Montojo Juan;Werner Marc W.;Schoeneich Hendrik |
分类号 |
H03D1/24;H04L27/06;H04L27/34;H04L1/00 |
主分类号 |
H03D1/24 |
代理机构 |
Mahamedi Paradice LLP |
代理人 |
Mahamedi Paradice LLP |
主权项 |
1. A receiver circuit to receive a quadrature amplitude modulation (QAM) data signal, the receiver circuit comprising:
a first de-mapper circuit to recover a set of encoded data bits from the QAM data signal by calculating a plurality of distances between a received QAM symbol and each of a plurality of possible constellation points; a decoder circuit to decode the set of encoded data bits recovered by the first de-mapper circuit; and a second de-mapper circuit to generate a set of un-encoded data bits for the received QAM symbol based, at least in part, on a result of the decoding and the plurality of distances calculated by the first de-mapper circuit, wherein the second de-mapper circuit is selectively operable in a first mode or a second mode, and wherein:
when operating in the first mode, the second de-mapper circuit is to recover the set of un-encoded data bits concurrently with the first de-mapper circuit recovering the set of encoded data bits; andwhen operating in the second mode, the second de-mapper circuit is to generate the set of un-encoded data bits after receiving the information about the plurality of distances calculated by the first de-mapper circuit and the result of the decoding. |
地址 |
San Diego CA US |