Spread-spectrum phase locked loop circuit and method

摘要

A phase locked loop (PLL) circuit and a method thereof are provided. In an embodiment, the PLL circuit includes: a switched capacitor circuit, in which the switched capacitor circuit generates a modulation waveform, and the modulation waveform is injected into the PLL circuit in a current form, so that a PLL output frequency is modulated. Compared with the spread spectrum phase locked loop (SS-PLL) in the prior art, the SS-PLL in embodiments of the present invention is simple in structure, low in power consumption, low in silicon overhead, and flexible both in spreading factor and modulation frequency.

主权项

1. A spread spectrum phase locked loop (PLL) circuit, comprising:
a spread spectrum clock generator (SSCG) including a switched capacitor circuit located in the SSCG, a first current source and a second current source, wherein the SSCG is configured to periodically and alternately select signals corresponding to the first current source and the second current source, respectively, with a frequency lower than a feedback clock signal, the switched capacitor circuit is configured to perform low pass filtering on the selected signals to generate a modulation waveform, wherein an output of the spread spectrum phase locked loop (PLL) circuit is modulated.