Cryptographic support instructions

摘要

A data processing system 2 includes a single instruction multiple data register file 12 and single instruction multiple processing circuitry 14. The single instruction multiple data processing circuitry 14 supports execution of cryptographic processing instructions for performing parts of a hash algorithm. The operands are stored within the single instruction multiple data register file 12. The cryptographic support instructions do not follow normal lane-based processing and generate output operands in which the different portions of the output operand depend upon multiple different elements within the input operand.

主权项

1. Data processing apparatus comprising:
a single instruction multiple data register file; and single instruction multiple data processing circuitry coupled to said single instruction multiple data register file and configured to be controlled by a single instruction multiple data program instruction to perform a processing operation independently upon separate data elements stored within separate lanes within an input operand register of said single instruction multiple data register file; wherein said single instruction multiple data processing circuitry is configured to be controlled by a further program instruction to perform a further processing operation upon a vector data value comprising a sequence of data elements held within an input operand register of said single instruction multiple data register file to produce an output operand stored within an output operand register of said single instruction multiple data register file, said output operand having a first portion with a value dependent upon all data elements within said sequence of data elements; and wherein said single instruction multiple data processing circuitry is configured to be controlled by a rotate instruction having an input operand and generating an output operand with a value the same as given by a right rotation of said input operand by two bit positions.