Reduced gain variation biasing for short channel devices

摘要

An amplifier biasing circuit that reduces gain variation in short channel amplifiers, an amplifier biasing circuit that produces a constant Gm biasing signal for short channel amplifiers, and a multistage amplifier that advantageously incorporates embodiment of both types of amplifier biasing circuits are described. Both amplifier biasing circuit approaches use an operational amplifier to equalize internal bias circuit voltages. The constant Gm biasing circuit produces a Gm of 1/R, where R is the value of a trim variable resistor value. The biasing circuit that reduces gain variation produces a Gm of approximately 1/R, where R is the value of a trim variable resistor value, however, the biasing circuit is configurable to adjust the bias circuit Gm to mitigate the impact of a wide range of circuit specific characteristics and a wide range of changes in the operational environment in which the circuit can be used, such as changes in temperature.

主权项

1. A system, comprising:
at least two or more amplifier stages coupled in series, each amplifier stage configured to receive bias signal output from a corresponding bias signal circuit among at least two or more bias signal circuits; and the at least two or more bias signal circuits, each bias signal circuit comprising:
a cascode transistor configured to source a current;an operational amplifier configured to counteract changes in a gain of the bias signal circuit at different operating temperatures for reducing variations in the gain, a first input of the operational amplifier connected to a drain terminal of a mirror device transistor, a second input of the operation amplifier connected to the cascode transistor; anda variable resistor configured to control a resistance, the variable resistor being connected with the mirror device transistor.