发明名称 DC/DC converter
摘要 A ZT comparator is configured to compare a voltage VZT at a ZT terminal with a predetermined threshold voltage VTH—BOTTOM, and to generate a bottom detection signal. A bottom count controller is configured to determine a count setting value based on an ON/OFF time which is a period of time from the time point at which a pulse signal SPWM transits to an on level that corresponds to the on state of a switching transistor up to the time point at which a bottom detection signal is first asserted, and based on the input voltage level of the DC/DC converter. Furthermore, the bottom count controller is configured to assert a set signal SSET every time the number of times the bottom detection signal is asserted reaches the count setting value.
申请公布号 US9106140(B2) 申请公布日期 2015.08.11
申请号 US201313934560 申请日期 2013.07.03
申请人 ROHM CO., LTD. 发明人 Sato Yoshinori
分类号 H02M3/335;H02M1/00 主分类号 H02M3/335
代理机构 Cantor Colburn LLP 代理人 Cantor Colburn LLP
主权项 1. A control circuit for a DC/DC converter, wherein the DC/DC converter comprises: a transformer comprising a primary winding, a secondary winding, and an auxiliary winding; a switching transistor arranged on a current path of the primary winding of the transformer; and a detection resistor arranged on a path of the switching transistor, and wherein the control circuit comprises: a feedback terminal configured to receive a feedback voltage that corresponds to an output voltage of the DC/DC converter;a current detection terminal configured to receive a detection voltage that develops at the detection resister;an auxiliary terminal configured to receive, as an input signal, a voltage at one end of the auxiliary winding;a pulse modulator configured to generate a pulse signal having a duty ratio that is adjusted according to the voltage at the aforementioned one end of the auxiliary winding, the detection voltage, and the feedback voltage, such that an output voltage of the DC/DC converter approaches a target value; and a driver configured to perform switching of the switching transistor according to the pulse signal, and wherein the pulse modulator comprises: a reset signal generating unit configured to generate a reset signal which is asserted according to the feedback voltage and the detection voltage; anda set signal generating unit configured to generate a set signal which is asserted according to the voltage at the auxiliary terminal, and wherein the pulse modulator is configured to generate a pulse signal which is switched to an on level that corresponds to an on state of the switching transistor when the set signal is asserted, and which is switched to an off level that corresponds to an off state of the switching transistor when the reset signal is asserted, and wherein the set signal generating unit comprises: a bottom detection comparator configured to compare the voltage at the auxiliary terminal with a predetermined threshold voltage, and to generate a bottom detection signal which is asserted every time the voltage at the auxiliary terminal crosses the threshold voltage; anda bottom count controller configured to determine a count setting value based on an ON/OFF time which is a period of time from a time point at which the pulse signal transits to the on level that corresponds to the on state of the switching transistor up to a time point at which the bottom detection signal is first asserted, and based on an input voltage level of the DC/DC converter, and to assert the set signal every time the number of times the bottom detection signal is asserted reaches the count setting value.
地址 JP