发明名称 SAFETY COMPUTING DEVICE, SAFETY INPUT DEVICE, SAFETY OUTPUT DEVICE, AND SAFETY CONTROLLER
摘要 A safety computing device includes a processor and a memory. The memory includes a first memory area and a second memory area having an address different from the first memory area. The processor includes an execution control unit performing a first process including the program process on input data written in the first memory area, and a second process including the program process on input data written in the second memory area and addition of redundancy code to output data written in the second memory area, a result collating unit collating output data to which redundancy code is added in the first and second processes, a computation diagnosis unit diagnosing presence or absence of failure in the processor and the memory, and an abnormality processing unit that, when an abnormality is detected by at least one of redundancy check, collation, and diagnosis, stops outputting output data.
申请公布号 US2015220378(A1) 申请公布日期 2015.08.06
申请号 US201314420988 申请日期 2013.03.11
申请人 Kanamaru Hiroo;Asano Yoshitomo;Yato Keiichi;Harada Hidetoshi 发明人 Kanamaru Hiroo;Asano Yoshitomo;Yato Keiichi;Harada Hidetoshi
分类号 G06F11/07;G06F11/263;G06F11/08 主分类号 G06F11/07
代理机构 代理人
主权项 1. A safety computing device comprising: a processor that executes a program process on input data; and a memory that stores the input data input to the processor and output data that is a result of the program process, wherein the memory is capable of storing the input data and the output data in each of a first memory area and a second memory area having an address different from an address of the first memory area, and the processor includes an execution control unit that performs a first process, which includes the program process performed on the input data written in the first memory area and addition of a redundancy code to the output data that is a result of the program process and is written in the first memory area, and a second process, which includes the program process performed on the input data written in the second memory area and addition of a redundancy code to the output data that is a result of the program process and is written in the second memory area,a result collating unit that collates the output data to which the redundancy code is added in the first process and the output data to which the redundancy code is added in the second process,a computation diagnosis unit that diagnoses, by computation, presence or absence of a failure in the processor and the memory, andan abnormality processing unit that, when an abnormality is detected by at least one of a redundancy check performed on the input data and the output data, a collation performed by the result collating unit, and a diagnosis performed by the computation diagnosis unit, stops outputting the output data.
地址 Tokyo JP