发明名称 |
MODULATION THROUGH DIFFERENTIALLY DELAYED CLOCKS |
摘要 |
A clock modulator can include two configurable delay units and can receive a baseband signal and a clock signal. The two configurable delay units can generate two delayed clock signals, each with different delay amounts. The delay amounts can be based on the baseband signal. The delayed clock signals can be combined to generate a modulated clock signal. A quadrature modulated clock signal can be generated when a first clock modulator receives a first baseband signal and a first clock signal and a second clock modulator receives a second baseband signal and a second clock signal. The first clock signal can be a ninety-degree phase shifted version of the second clock signal. The modulated clock signal from the first clock modulator can be combined with the modulated clock signal from the second clock modulator to generate the quadrature modulated clock signal. |
申请公布号 |
WO2015116655(A1) |
申请公布日期 |
2015.08.06 |
申请号 |
WO2015US13245 |
申请日期 |
2015.01.28 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
TALWALKAR, NIRANJAN ANAND;KASTURIA, SANJAY |
分类号 |
H03C3/40;H03C5/00;H03F3/217 |
主分类号 |
H03C3/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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