发明名称 DEVICE AND METHOD FOR SIGNAL ANALYSIS
摘要 <p>PROBLEM TO BE SOLVED: To provide a device and method for signal analysis, capable of reducing a lag in start time for measuring a signal under measurement by reducing a time lag between input timing of a trigger signal and latch timing of the trigger signal.SOLUTION: A signal analysis device includes a clock generator unit 41, delay unit 42, latch unit 43, and determination unit 44. A delay unit 42 generates delayed trigger signals by delaying an input trigger signal by time periods shorter than a period of a clock generated by the clock generator unit 41. The latch unit 43 outputs latched trigger signals obtained by latching the input trigger signal and delayed trigger signals using the clock. A determination unit 44 determines input timing of the input trigger signal using the latched trigger signals output by the latch unit. The input timing of the input trigger signal can thus be determined with a resolution as high as the delay period, enabling reduction of a lag in start time for measuring a signal under measurement.</p>
申请公布号 JP2015143643(A) 申请公布日期 2015.08.06
申请号 JP20140016899 申请日期 2014.01.31
申请人 ANRITSU CORP 发明人 ITO SHINICHI;INOUE TAKESHI;ONO JUN;NISHIO KEISUKE;KONDO YUKI
分类号 G01R23/16;G01R23/173 主分类号 G01R23/16
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