CIRCUIT FOR DETECTING AND CORRECTING TIMING ERRORS

摘要

A circuit for detecting and correcting timing errors. A timing circuit includes an interpolator. The interpolator includes a fine counter, a coarse counter, and stop correction logic. The coarse counter is incremented by a rollover output of the fine counter to generate a coarse count value. The stop correction logic is coupled to the fine counter and the coarse counter. The stop correction logic divides each cycle of the rollover output into first, second, and third time intervals, and selects a coarse counter output value to represent a time interval measured by the coarse counter based on a one of the first, second, and third intervals in which a time measurement stop signal is detected.

主权项

1. A timing circuit, comprising:
an interpolator comprising:
a fine counter; anda coarse counter incremented by a rollover output of the fine counter to generate a coarse count value, wherein the rollover output comprises a leading edge and a trailing edge;stop correction logic coupled to the fine counter and the coarse counter, the stop correction logic configured to:
divide each cycle of the rollover output into time intervals comprising:
a first time interval extending from the leading edge to a predetermined time prior to the trailing edge;a second time interval extending from the predetermined time prior to the trailing edge to a predetermined time after the trailing edge; anda third time interval extending from the predetermined time after the trailing edge to a succeeding leading edge; andselect a coarse counter output value to represent a time interval measured by the coarse counter based on a one of the first, second, and third intervals in which a time measurement stop signal is detected.