发明名称 CIRCUITRY FOR AND METHOD OF GENERATING A FREQUENCY MODULATED RADAR TRANSMITTER SIGNAL, A RADAR TRANSCEIVER CIRCUIT AND A RADAR SYSTEM
摘要 A circuitry for and a method of generating a frequency modulated radar transmitter signal are provided. The circuitry comprises a modulation signal generator for generating a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal and comprises a PLL circuitry for generating the frequency modulated radar transmitter signal in dependence of the modulation signal. In the PLL circuitry a controllable frequency divider controls the output frequency of the PLL circuitry in dependence of the modulation signal. The PLL circuitry further comprises a phase detector, a controllable oscillator and possibly a low pass filter. The PLL circuitry further comprises a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of PLL circuitry.
申请公布号 US2015219753(A1) 申请公布日期 2015.08.06
申请号 US201414324322 申请日期 2014.07.07
申请人 SALLE DIDIER;DOARE OLIVIER;LANDEZ CHRISTOPHE 发明人 SALLE DIDIER;DOARE OLIVIER;LANDEZ CHRISTOPHE
分类号 G01S7/40;G01S13/02 主分类号 G01S7/40
代理机构 代理人
主权项 1. A circuitry for generating a frequency modulated radar transmitter signal, the circuitry comprising a reference input for receiving a reference signal having a reference frequency, a circuitry output for providing the frequency modulated radar transmitter signal a modulation signal generator for generating a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal a Phase Locked Loop circuitry for generating the frequency modulated radar transmitter signal in dependence of the modulation signal, the Phase Locked Loop circuitry comprising: a controllable oscillator for generating a PLL output signal at an oscillator output, a frequency of the PLL output signal is controlled in dependence of a control voltage,a phase detector for generating the control voltage in dependence of a phase difference between a feedback signal and the reference signal,a controllable frequency divider receiving the PLL output signal of the oscillator output and generating the feedback signal, a frequency of the feedback signal being substantially equal a frequency of the PLL output signal of the output divided by a controllable factor, the controllable factor being dependent on the modulation signal,a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of Phase Locked Loop circuitry.
地址 TOULOUSE FR