SRAM Cell Connection Structure

摘要

A Static Random Access Memory (SRAM) cell includes a first pull-up transistor and a second pull-up transistor, and a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor. A conductive feature includes a first leg having a first longitudinal direction, wherein the first leg interconnects a drain of the first pull-up transistor and a drain of the first pull-down transistor. The conductive feature further includes a second leg having a second extending direction. The first longitudinal direction and the second extending direction are un-perpendicular and un-parallel to each other. The second leg interconnects the drain of the first pull-up transistor and a gate of the second pull-up transistor.

主权项

1. A device comprising:
a Static Random Access Memory (SRAM) cell comprising:
a first cell boundary and a second cell boundary parallel to each other;a third cell boundary and a fourth cell boundary parallel to each other and perpendicular to the first cell boundary and the second cell boundary;a first pull-up transistor and a second pull-up transistor;a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor;a first pass-gate transistor connected to drains of the first pull-up transistor and the first pull-down transistor; anda second pass-gate transistor connected to drains of the second pull-up transistor and the second pull-down transistor; a first Vss line overlapping and parallel to the first cell boundary; a first via underlying and contacting the first Vss line, wherein the first via electrically couples the first Vss line to a source of the first pull-down transistor; a word line parallel to the first Vss line; and a second via underlying and contacting the word line, wherein the second via electrically couples the word line to a gate of the first pass-gate transistor, and wherein in a top view of the SRAM cell, a first connecting line connecting a first center of the first via and a second center of the second via is un-parallel and un-perpendicular to the first, the second, the third, and the fourth cell boundaries.