TRANSMITTER SERIALIZER LATENCY TRIM

摘要

A system and method for transmitting includes a plurality of multiplexers each configured to combine a pseudo random bit sequence (PRBS) with at least one input stream according to the data control clock. At least one storage device is coupled to an output of each of the plurality of multiplexers and is configured to latch data according to the data control clock. An output multiplexer is coupled to each of the at least one storage device and is configured to select between storage paths according to the data serializer clock. A PRBS checker is configured to compare a PRBS pattern on an output of the output multiplexer with a predicted PRBS pattern. A phase rotator is configured to adjust the data serializer clock based upon the comparison of the PRBS checker to reduce latency of the transmitter.

主权项

1. A transmitter, comprising:
a plurality of multiplexers each configured to combine a pseudo random bit sequence (PRBS) with at least one input stream according to a data control clock; at least one storage device coupled to an output of each of the plurality of multiplexers and configured to latch data according to the data control clock; an output multiplexer coupled to each of the at least one storage device and configured to select between storage paths according to the data serializer clock; a PRBS checker configured to compare a PRBS pattern on an output of the output multiplexer with a predicted PRBS pattern; and a phase rotator configured to adjust the data serializer clock based upon the comparison of the PRBS checker to reduce latency of the transmitter.