发明名称 NON-VOLATILE MEMORY WITH MULTIPLE LATENCY TIERS
摘要 A non-volatile memory device with multiple latency tiers includes at least two crossbar memory arrays, each crossbar memory array comprising a number of memory cells, each memory cell connected to a word line and a bit line at a cross point. The crossbar memory arrays each have a different latency. The crossbar memory arrays are formed on a single die.
申请公布号 WO2015116188(A1) 申请公布日期 2015.08.06
申请号 WO2014US14227 申请日期 2014.01.31
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 HENZE, RICHARD H.;MURALIMANOHAR, NAVEEN;JEON, YOOCHARN;FOLTIN, MARTIN;ORDENTLICH, ERIK;LESARTRE, GREGG B.;WILLIAMS, R. STANLEY
分类号 H01L27/115;H01L21/8242 主分类号 H01L27/115
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