| 摘要 |
[Problem] To provide a semiconductor integrated circuit device wherein a reverse current due to erroneous connection or the like of signal lines is eliminated, and unnecessary power loss of a circuit can be suppressed in a normal operation state. [Solution] In the cases of abnormal states wherein an output voltage (VOUT) is lower than a ground potential (VSS) due to erroneous connection or the like, an N-type DMOS transistor (Qd1) and a first P-type MOS transistor (Qp1) are turned off, a voltage is applied in the reverse direction to the parasitic diodes of the transistors, and a current does not flow in the parasitic diodes. In a normal state wherein the output voltage (VOUT) is higher than the ground potential (VSS), the N-type DMOS transistor (Qd1) and/or the first P-type MOS transistor (Qp1) is turned on, said N-type DMOS transistor and first P-type MOS transistor being connected in parallel, and a current does not flow in a parasitic diode (D1) of the N-type DMOS transistor (Qd1). |
