摘要 |
<p>Disclosed are a common data bus circuit and an integrated circuit including the bus circuit thereof. According to the present invention, the common data bus circuit comprises: a common data bus for connecting a plurality of output units and one output end unit; a plurality of output unit drivers provided at the output units, respectively, realized as a 3-state logic that is selectively operated by a separate control signal (EN), and driving a signal of the output units as the common data bus signal; and at least one auxiliary driver, wherein the auxiliary driver senses transition of the common data bus signal in order to pull up or pull down the common data bus signal, such that the transition of the common data bus signal according to an output unit driver which is not selected among the output drivers and a capacitance of the common data bus is not delayed but rapidly performed.</p> |