发明名称 Target and method for mask-to-wafer CD, pattern placement and overlay measurement and control
摘要 A method for mask-to-wafer correlation among multiple masking levels of a semiconductor manufacturing process. The method includes creating compact targets containing structure patterns suitable for pattern placement, critical dimension and overlay measurement at a set of common locations on two or more patterning layers, and creating at least two masks containing functional circuit structure patterns and the compact targets at locations between functional circuit structure patterns. The method then includes measuring the targets, determining overlay variation between the masks, exposing and creating with one mask a first lithographic processing layer on a wafer, and exposing and creating with another mask a second lithographic processing layer on the wafer, over the first layer. The method further includes measuring the targets on the wafer at one or more of the layers, and correlating the mask and wafer measurements to distinguish mask and lithography induced components of critical dimension and overlay variation.
申请公布号 US9097989(B2) 申请公布日期 2015.08.04
申请号 US200912360132 申请日期 2009.01.27
申请人 International Business Machines Corporation 发明人 Ausschnitt Christopher P.;Morillo Jaime D.;Rankin Jed H.;Yerdon Roger J.
分类号 G03F9/00;G03C5/00;G03F1/38;G03F7/20;G03F1/00;G03F1/42 主分类号 G03F9/00
代理机构 DeLio, Peterson & Curcio, LLC 代理人 DeLio, Peterson & Curcio, LLC ;Nowak Kelly M.;Cai Yuanmin
主权项 1. A method for mask-to-wafer correlation among multiple masking levels of a semiconductor manufacturing process comprising: creating compact targets containing structure patterns suitable for pattern placement, critical dimension and overlay measurement at a set of common locations on two or more patterning layers; creating at least two masks containing functional circuit structure patterns and the compact targets at locations between functional circuit structure patterns; measuring the targets on the masks; determining overlay variation between the masks; exposing and creating with one of the masks a first lithographic processing layer on a wafer; exposing and creating with another of the masks a second lithographic processing layer on the wafer, over the first layer; measuring the targets on the wafer at one or more of the layers; correlating the mask and wafer measurements to distinguish mask and lithography induced components of critical dimension and overlay variation.
地址 Armonk NY US