Erase algorithm for flash memory

摘要

A non-volatile memory device includes a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in a first block of memory cells. The pass/fail indicator has a first value indicating the respective sector has failed erase verification and has a second value indicating the respective sector has passed erase verification. The sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block. The first block is subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.

主权项

1. A non-volatile memory device, comprising:
a two-dimensional array of non-volatile memory cells, the array of memory cells including at least a first block of memory cells formed in a first well region, the first block of memory cells being divided into two or more sectors of memory cells; a row decoder comprising a row pre-decoder and a word line driver circuit, the row pre-decoder being configured to control a plurality of word lines corresponding to rows of the array of memory cells, the row pre-decoder being configured to activate one or more of the plurality of word lines in response to a row address, the word line driver configured to drive the one or more activated word lines to a first bias voltage level; a first bias switch circuit configured to provide voltage pulses at the first bias voltage level to the word line driver circuit; a second bias switch circuit configured to provide voltage pulses at a second bias voltage level to the first well region; and a sector pass/fail indicator circuit configured to store a pass/fail indicator for each sector in the first block, the pass/fail indicator having a first value indicating the respective sector has failed erase verification and having a second value indicating the respective sector has passed erase verification, the pass/fail indicator values being provided to the row decoder, wherein the sector pass/fail indicator circuit set the respective pass/fail indicators to the second value for one or more sectors in the first block after the respective sectors pass erase verification following a previous block erase operation of the first block, the first block being subjected to subsequent block erase operation where only word lines associated with the sectors having a pass/fail indicator having the first value are biased to the first bias voltage level.