ESD protection circuit with isolated SCR for negative voltage operation

摘要

A semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the buried layer. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the buried layer.

主权项

1. A semiconductor controlled rectifier, comprising:
a first lightly doped region having a first conductivity type; a first heavily doped region having a second conductivity type formed within the first lightly doped region, the first heavily doped region forming an anode of the semiconductor controlled rectifier; a second lightly doped region having the second conductivity type formed at a first time proximate the first lightly doped region; a second heavily doped region having the first conductivity type formed within the second lightly doped region, the second heavily doped region forming a cathode of the semiconductor controlled rectifier; a fourth heavily doped region having a first conductivity type formed within the first lightly doped region and electrically connected to the first heavily doped region; a fifth heavily doped region having a second conductivity type formed within the second lightly doped region and electrically connected to the second heavily doped region; shallow trench isolation regions between and separating the first, second, fourth and fifth heavily doped regions; wherein the shallow trench isolation region is omitted from between the first heavily doped region and the second heavily doped region; a gate formed over a junction between the first lightly doped region and the second lightly doped region; a buried layer having the first conductivity type formed below the second lightly doped region and electrically connected to the first lightly doped region; a third lightly doped region having the second conductivity type formed at a second time between the second lightly doped region and the buried layer; a fourth lightly doped region having the second conductivity type formed at a third time between the second lightly doped region and the buried layer and electrically connected to the second and third lightly doped regions; wherein the second lightly doped region in combination with the third lightly doped regions and the fourth lightly doped region form the bases of the NPN transistors of the semiconductor controlled rectifier; wherein the first lightly doped region in combination with the buried layer form the bases of the PNP transistors of the semiconductor controlled rectifier; and also wherein the semiconductor controlled rectifier is formed on a substrate having the second conductivity type, and wherein the second lightly doped region is electrically isolated from the substrate by the first lightly doped region and the buried layer.