Method and system for determining overlap process windows in semiconductors by inspection techniques

摘要

The formation of overlap areas in sophisticated semiconductor devices is a critical aspect which may not be efficiently evaluated on the basis of conventional measurement and design strategies. For this reason, the present disclosure provides measurement techniques and systems in which overlying device patterns are transformed into the same material layer, thereby forming a combined pattern which is accessible by well-established defect inspection techniques. Upon geometrically modulating some of these combined patterns, a systematic evaluation of overlap process windows may be accomplished.

主权项

1. A method, comprising:
forming a first combined pattern from a first layout layer and a second layout layer of a semiconductor device in a material layer formed in a first test region of a substrate, said first and second layout patterns defining an overlap area; forming a second combined pattern from said first layout layer and said second layout layer in said material layer formed in a second test region of said substrate, said second combined pattern including a geometric modulation relative to said first combined pattern; and performing an inspection process at least for said overlap area in said first and second test regions.