Program VT spread folding for NAND flash memory programming

摘要

Embodiments of methods and systems disclosed herein provide a NAND cell programming technique that results in a substantially reduced Tprog to complete a programming operation. In particular, embodiments of the subject matter disclosed herein utilize two Vpgm programming pulses during each programming iteration, or loop. One of the two programming pulses corresponds to a conventional programming Vpgm pulse and the second pulse comprises a programming pulse that having a greater Vpgm that is greater than the conventional programming Vpgm so that the slow cells are programmed to PV in fewer pulses (iterations), thereby effectively simultaneously programming and verifying cells having different programming speeds.

主权项

1. A method to program a NAND device, the method comprising:
applying a first programming pulse to gates of a plurality of NAND cells of a word line; determining a programmed threshold voltage (Vt) of each of the plurality of NAND cells in response to the first programming pulse; categorizing a NAND cell as a fast cell if the determined Vt of the NAND cell is greater a first predetermined voltage, otherwise categorizing the NAND cell as a slow cell; applying a second programming pulse to the gates of the slow-cell NAND cells if a slow cell NAND cell has a determined Vt that is less than a program verify (PV) voltage; applying a third programming pulse to the gates of the slow-cell and fast-cell NAND cells if a NAND cell has a determined Vt that is less that the PV voltage, the third programming pulse having a programming voltage that is less than the programming voltage of the second programming pulse; and repeating the applying of the second and third programming pulses to the gates of the NAND cells until all of the NAND cells have a Vt that is greater than the PV voltage.