发明名称 Lateral high-voltage transistor and method for manufacturing the same
摘要 A lateral high-voltage transistor includes: a semiconductor substrate; a semiconductor layer being provided on one main surface of the semiconductor substrate; a source region being provided selectively in a surface of the semiconductor layer; a drain region being provided selectively in the surface of the semiconductor layer; a gate electrode provided on a part of the semiconductor layer between the source region and the drain region with interposition of the gate insulating film; and a drift region being provided selectively in the surface of the semiconductor layer. The drift region includes a stripe-shaped diffusion layer extending in parallel with a direction from the drain region toward the source region. The stripe-shaped diffusion layer includes linear diffusion layers each including stripe-shaped diffusion regions that are adjacent to each other such that double diffusion occurs in a portion where the stripe-shaped diffusion regions are adjacent to each other.
申请公布号 US9099551(B2) 申请公布日期 2015.08.04
申请号 US201313950184 申请日期 2013.07.24
申请人 Mitsubishi Electric Corporation 发明人 Yoshino Manabu
分类号 H01L29/78;H01L29/66;H01L27/112;H01L21/04;H01L21/02 主分类号 H01L29/78
代理机构 Studebaker & Brackett PC 代理人 Studebaker & Brackett PC
主权项 1. A lateral high-voltage transistor comprising: a semiconductor substrate having a first conductive type; a semiconductor layer having a second conductive type, said semiconductor layer being provided on one main surface of said semiconductor substrate; a source region having the first conductive type, said source region being provided selectively in a surface of said semiconductor layer; a drain region having the first conductive type, said drain region being provided selectively in the surface of said semiconductor layer such that said drain region is spaced apart from said source region; a gate electrode provided on a part of said semiconductor layer between said source region and said drain region with interposition of a gate insulating film such that one end of said gate electrode overlaps said source region in a plan view; and a drift region having the first conductive type, said drift region being provided selectively in the surface of said semiconductor layer such that one end of said drift region is connected to said drain region and the other end of said drift region overlaps the other end of said gate electrode in a plan view, wherein said drift region includes a stripe-shaped diffusion layer extending in parallel with a direction from said drain region toward said source region, said stripe-shaped diffusion layer includes linear diffusion layers each including stripe-shaped diffusion regions that are adjacent to each other such that double diffusion occurs in a portion where said stripe-shaped diffusion regions overlap each other.
地址 Tokyo JP