Field effect transistor

摘要

The following layers are deposited above the upper surface of a base substrate in this order with a lattice relaxation layer therebetween: a lower barrier layer made of AlxGa1-xN (0

主权项

1. A field effect transistor comprising:
a lower barrier layer which is placed on a substrate and which is made of AlxGa1-xN; a channel layer which is placed on a surface of the lower barrier layer that is opposite to the substrate and which is made of GaN; an upper barrier layer which is placed on a surface of the channel layer that is opposite to the lower barrier layer and which is made of AlyGa1-yN having an Al composition proportion exceeding an Al composition proportion of the lower barrier layer; a source electrode and drain electrode which are placed on a surface of the upper barrier layer that is opposite to the channel layer; an insulating layer placed on a region of the upper barrier layer, the region being in a surface of the upper barrier layer that is provided with the source electrode and the drain electrode, the region excluding a region provided with the source electrode and the drain electrode; a gate electrode placed on the insulating layer; and a region directly under the gate electrode having a recessed structure in which the insulating layer extends through the upper barrier layer and partly into the channel layer; wherein the channel layer includes a first channel sub-layer located on the upper barrier layer side and a second channel sub-layer located on the lower barrier layer side, the n-type doping concentration of the first channel sub-layer is less than the n-type doping concentration of the second channel sub-layer, and the insulating layer is placed so as not to reach the second channel sub-layer.