Non-volatile memory device and method of manufacturing the same

摘要

A non-volatile memory device includes first and second vertical channel layers generally protruding upwardly from a semiconductor substrate substantially in parallel; a first gate group configured to include a plurality of memory cell gates which are stacked substantially along the first vertical channel layer and are isolated from each other with an interlayer insulating layer interposed substantially between the memory cell gates; a second gate group configured to include a plurality of memory cell gates which are stacked substantially along the second vertical channel layer and are isolated from each other with the interlayer insulating layer interposed substantially between the memory cell gates; a pipe channel layer configured to couple the first and the second vertical channel layers; and a channel layer extension part generally extended from the pipe channel layer to the semiconductor substrate and configured to couple the pipe channel layer and the semiconductor substrate.

主权项

1. A method of manufacturing a non-volatile memory device, comprising:
forming a sacrificial layer pattern substantially over a semiconductor substrate; forming a stack structure by alternately stacking a plurality of first and second material layers substantially over the sacrificial layer pattern; forming first and second channel holes configured to penetrate the stack structure and to have the sacrificial layer pattern substantially exposed therethrough; forming a pipe channel hole by substantially removing the sacrificial layer pattern; forming a semiconductor layer generally on a surface of the pipe channel hole and substantially within the first and the second channel holes; forming a slit configured to penetrate the stack structure substantially between the first and the second channel holes and the semiconductor layer and extended down to the semiconductor substrate; and substantially filling the pipe channel hole and a part of the slit, extended from the pipe channel hole to the semiconductor substrate, with a semiconductor layer.