发明名称 Integrated circuit optimization
摘要 A device may identify signal channels for connecting circuit blocks, where each circuit block is associated with a block implementation area corresponding to a substrate. The device may assign a channel priority to each of the signal channels based on at least one channel criteria. The device may allocate a channel implementation area, corresponding to the substrate, for each of a plurality of signal channels, based on the channel priority assigned to the signal channel and based on the block implementation areas. The device may generate an integrated circuit design comprising the channel implementation area allocated for each of the plurality of signal channels.
申请公布号 US9098664(B2) 申请公布日期 2015.08.04
申请号 US201414194129 申请日期 2014.02.28
申请人 Juniper Networks, Inc. 发明人 Trivedi Vivek;Siddiqui Khalil
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Harrity & Harrity, LLP 代理人 Harrity & Harrity, LLP
主权项 1. A system comprising: a device to: allocate, for a signal channel, a channel implementation area of a substrate, the signal channel connecting circuit blocks of the substrate;select a wire pattern for signal wires, the signal wires being associated with the signal channel,the wire pattern being selected based on the signal wires;allocate, based on the wire pattern, a wire implementation area, of the substrate, for each signal wire of the signal wires; andgenerate an integrated circuit design, the integrated circuit design comprising: the channel implementation area, andthe wire implementation area allocated for each signal wire of the signal wires.
地址 Sunnyvale CA US